1. Field of the Invention
The invention relates in general to a method of fabricating a capacitor, and more particularly to a method of fabricating a self-aligned capacitor for dynamic random access memory (DRAM).
2. Description of the Related Art
The prior DRAM cell includes a transfer field effect transistor (TFET) and a storage capacitor. FIG. 1 shows a circuit diagram of a prior DRAM cell. The capacitor C is usually formed in an array of capacitors. The function of the capacitor C is to store data by charging or discharging. For example, binary bit data is stored in the capacitor C. The logic state of the binary bit data is "0" when the capacitor C discharges, while the logic state of the binary bit data is "1" when the capacitor C charges.
Usually, there is a dielectric layer 101 formed between the upper electrode 100 of the capacitor C and the bottom electrode 102 of the capacitor C. The dielectric layer 101 provides a dielectric layer with the required dielectric constant between two electrodes. The capacitor C is coupled to a bit line BL. The capacitor C performs reading/writing operation by charging/discharging. The charging/discharging states of the capacitor C are switched by the transfer field effect transistor T. The method of switching the charging/discharging states includes connecting the bit line BL and the source of the transfer field effect transistor T, and connecting the capacitor C and the drain of the transfer field effect transistor T. The information from the word line WL is transferred to the gate of the transfer field effect transistor T to determine whether or not the capacitor C connects the bit line BL.
As the performance of the microprocessor of the computer improves, there are demands for an increased amount of charge storage and a higher quality memory cell capacitors. The methods of increasing the charge storage amount of the capacitor includes following: (1) increasing the surface area of the charge storage of the capacitor, (2) selecting a dielectric material with a high dielectric constant; and (3) decreasing the thickness of the dielectric layer between two electrodes of the capacitor. However, there are limitations on decreasing the thickness of the dielectric layer between two electrodes of the capacitor. Therefore, the better method of increasing the charge storage amount of the capacitor is to increase the surface area of the charge storage of the capacitor.
However because the integration of integrated circuits (IC) is rising, the area that can be occupied by the capacitor decreases. The charge storage amount of the capacitor decreases, too. Therefore, a simple manufacturing method for a capacitor having a charge storage area with a large surface are has become one of the most important topics in current semiconductor research.